One of the functions that is required in a digital communications receiver or digital demodulator is to acquire and track the frequency error between the carrier that is being used to transmit the information and the local oscillator signal of the receiver. Frequency tracking is required in order to perform demodulator functions such as non-coherent data demodulation, or as a preliminary step prior to carrier phase acquisition and tracking. Thus, there is a need to perform carrier frequency discrimination. The present invention fulfills this need.
Various digital communications systems are known. For example, see U.S. Pat. No. 5,060,180 issued Oct. 22, 1991 for "Programmable Digital Loop Filter" by Samuel C. Kingston et al; U.S. Pat. No. 4,841,552 issued Jun. 20, 1989 for "Digital Phase Shifter" by Samuel C. Kingston; and U.S. Pat. No. 5,022,048 issued Jun. 4, 1991 for "Programmable Digital Frequency-Phase Discriminator" by Samuel C. Kingston et al, each of which is hereby incorporated by reference herein.
In Kingston et al '180, a programmable second order loop filter is provided with first and second programmable scaling circuits arranged in parallel and having their outputs connected to first and second programmable one bit serial adders respectively. The output of the second programmable serial adder is coupled to the input of the first programmable serial adder and has its output coupled to the input of a programmable output stage so as to provide the ability to maintain the average quantization bit error to one-half of one bit of the least significant bit of the full loop filter width even though the output does not use or employ all of the significant bits. FIG. 2 of the Kingston et al '180 patent shows a phase-locked loop employing a clock synthesizer 77 and passing through receiver stages 10, demodulator 54, line 55, switch 67, line 76, clock synthesizer 77, line 78, master clock or system clock 72, line 73, timing and control circuit 74 and line 53 applied to the clock input of receiver stages 10.
Kingston '552 describes a digital phase shifter for accomplishing digital phase shifting without the requirement of complex multiplication. The phase shifter includes buffer registers for receiving and storing the inphase and quadrature components of a complex number and for storing in a phase command register the information indicative of the phase shift to be accomplished. The phase shifting apparatus comprises a command map for generating a plurality of plus or minus phase shift command bits. A plurality of plus or minus phase shift registers are coupled to the phase shift command bits for performing plus or minus phase shifts of predetermined angles that diminish by a factor of approximately one-half from the previous phase shift angle.
Kingston et al '048 describes a frequency-phase discriminator that has input channels for real and imaginary data which are coupled to two programmable despreaders. The first despreader has its real and imaginary outputs coupled to individual programmable data rate filters which have their individual outputs coupled to a quadrant detector that generates a phase angle direction signal and sign magnitude. The second despreader has its real and imaginary outputs connected through individual programmable inverters to data rate filters which have their individual outputs coupled to a quadrant selector that selects error signal data rate information from one of four quadrant axes signals. A command generator is programmably coupled to the output of the quadrant detector into the input of the quadrant selector and provides a selection signal to the quadrant selector which produces a frequency error signal output employed in a frequency lock loop or in a phase lock loop.
A conventional method for digital frequency discrimination typically requires at least two samples per data bit. An example of this kind of frequency discriminator can be found in U.S. Pat. No. 5,022,048 to Kingston et al, described above.
One of the challenges in performing carrier recovery in digital communication systems is the fact that binary data is used to modulate the carrier, so that the data modulation needs to be removed in order to estimate the carrier frequency error. For this reason, in conventional systems, multiple samples are taken per data bit so that the data is constant for each of those samples. The data can then be estimated and removed from those samples before performing frequency error estimation. However, this approach requires multiple samples per bit which lowers the allowable bit rate that can be processed by the receiver to say one-half to one-fourth of the sample rate.
Carrier frequency acquisition, or automatic frequency control (AFC), poses a particular challenge for the case of high-rate unspread signals. In order to aid in carrier acquisition, a prior art practice is to employ a frequency detector that can be used as part of an AFC loop to pull-in the carrier frequency to within the acquisition range of the carrier phase lock loop.
This prior art frequency detector utilizes part of an AFC loop and requires at least two samples per symbol to operate. The carrier frequency error is the derivative of the carrier phase error. Accordingly, the frequency error detector computes an estimate of the derivative of the carrier phase error. This estimate is determined by using the following approximation: ##EQU1## Where T is the symbol period
.phi. (t) is the carrier phase, PA1 .phi. (kT-T/2) is the estimated carrier phase at time t=kT-T/2, and PA1 .phi. (kT) is the estimated carrier phase at time t=kT (i.e., for the kth symbol).
This detector uses a data-aided method that uses hard data estimates to remove the effect of data modulation from the phase estimates. Two samples per symbol are required so that a single data decision can be applied to remove the data from both phase estimates.
However, in order to use this detector, a minimum of two samples per symbol are required. However, high rate unspread signals operate at one sample per data symbol. Especially for that case, a frequency detector that can operate at a rate of one sample per symbol is required. The present invention fulfills this need.